L-29: Applications of Semiconductor Devices

Physics — Class 12 · NIOS Code 312 · Module 8 · Source: 312_Physics_Eng_Lesson29.pdf

Applications of Semiconductor Devices

Semiconductor diodes and transistors power everyday appliances — chargers, TVs, computers, alarms — and industrial control systems. This lesson covers rectification, voltage regulation, transistor amplifier/switch/oscillator circuits, and digital logic gates.

29.1 Applications of p-n Junction Diodes

A p-n junction conducts asymmetrically: low resistance forward, high resistance reverse. This enables rectification — converting AC (average voltage zero) into pulsating DC.

29.1.1 Half-Wave Rectification

AC mains → step-down transformer T → terminals X, Y → diode D → load R_L. Positive half-cycle (0 to T/2): D forward biased, current flows A→B. Negative half-cycle (T/2 to T): D reverse biased, no current. Only half the input power is used.

PIV (Peak Inverse Voltage): maximum reverse voltage diode can withstand without breakdown = peak AC voltage V_m. Diode PIV must exceed V_m.

Fig 29.1–29.2 — Half-wave rectifier uses one diode; output is pulsating unidirectional current

V_dc = V_m/π | I_dc = V_m/(πR_L)

Half-wave rectifier average DC voltage and current
V_m = peak AC voltage from transformer secondary
Only ~50% of input power utilized — inefficient

Full-Wave Rectification

Centre-tapped step-down transformer: secondary windings X–Y and Z–Y in opposite phase. Diodes D1 (X side) and D2 (Z side); load between cathodes and centre tap Y. When X positive → D1 conducts; when Z positive → D2 conducts. Current through R_L same direction both halves → full-wave output.

Fig 29.3–29.5 — Two diodes conduct alternately; output current flows one direction entire cycle

V_dc = 2V_m/π | I_dc = 2V_m/(πR_L)

Full-wave rectifier — twice the half-wave average
Output still pulsates max→min — needs filtering for steady DC
PIV of each diode should be ≥ 2V_m when capacitor filter used

Filtering

Capacitor C across R_L filters high-frequency ripple: charges to ~V_m when diode conducts, discharges when current falls, maintaining smoother voltage. Larger C and R_L → smaller fluctuations. Power supplies also use LC or π (C-L-C) filters.

29.1.2 Zener Diode as Voltage Regulator

Simple rectifier + filter output drops when load current increases or input AC varies. A Zener regulator gives constant V_O ≈ V_Z (breakdown voltage). Circuit: series resistor R_S, Zener in reverse bias across load R_L. Requires V_i > V_Z.

Fig 29.8 — Zener in reverse breakdown maintains constant output voltage V_Z

I_S = (V_i − V_Z)/R_S | I_Z = I_S − I_L | P_d = V_Z × I_Z

Kirchhoff: I_S splits between Zener and load
When I_L increases, I_Z decreases — V_O stays V_Z
I_{Z min} ~ 5–20 mA must always flow · P_d must not exceed rating

Example 29.1: 6 V, 0–100 mA load, V_i = 16.5–21 V → R_S = (16.5−6)/0.105 ≈ 100 Ω; use 6 V, 1 W Zener.

29.2 Transistor Applications

29.2.1 Transistor as an Amplifier

Small base current controls large collector current. CE amplifier: collector reverse biased via V_CC and R_L; base forward biased with V_BB at centre of linear region. Input signal υ_S superimposed on bias — must stay within limits to avoid cut-off or saturation distortion.

A_V = V_O/V_i = −βR_L/r_i = −g_mR_L

Voltage gain — negative sign = 180° phase shift (input/output opposite)
Δi_c = βΔi_b; g_m = β/r_i (transconductance)
A_P = A_I × A_V = β × A_V — gain from DC supply, not violation of energy conservation

Faithful amplification: operating point at centre of linear I_B range; signal small enough that I_B ± Δi_b never hits cut-off or saturation.

29.2.2 Transistor as a Switch

Two distinct states for digital control:

Cut-off (I_B ≤ 0): transistor off, V_CE = V_CC, V_O = V_CC
Saturation (I_B large): V_{CE sat} ≈ 0, V_O ≈ 0, I_C = V_CC/R_L

With V_BB = 0: I_B = −V_BE/R_B < 0 → cut-off. With V_BB = 5 V: I_B ≈ 43 μA → saturation. LED in collector circuit lights on high input — digital indicator.

Fig 29.10–29.12 — Transistor toggles between cut-off and saturation like an electronic switch

29.2.3 Transistor as an Oscillator

Generates sustained AC oscillations. Needs amplifier + positive feedback. Loop condition: Aβ = 1 for constant amplitude. CE amplifier gives −180° phase shift; feedback network must add another 180°.

Colpitt's oscillator: LC tank (C1, C2, L) at resonant frequency; output across C1; feedback across C2 to base. Two 180° shifts (amplifier + capacitor network) → sustained oscillations when gain sufficient at f_res.

29.3 Logic Gates

Digital signals take only discrete values — typically 0 V = bit '0', 5 V = bit '1'. Immune to ~2 V noise. Boolean algebra: A×0 = 0; A+1 = 1.

Fig 29.16–29.20 — AND, OR, NOT basics; NAND and NOR are universal building blocks

29.3.1 Basic Logic Gates

AND: Y = A·B = AB — output '1' only when both inputs '1'. DDL: diodes to ground → 0.7 V (0) when any input low; 5 V (1) when both high.
OR: Y = A+B — output '1' if any input '1'. Diode OR: cathodes grounded; any high input → ~5 V output.
NOT: Y = Ā — inverts input. Implemented by transistor switch: input '0' → transistor off → V_O = 5 V; input '1' → conducts → V_O = 0.

29.3.2 Combination Logic Gates

NAND = NOT + AND — output '1' unless both inputs '1'. Symbol: AND with bubble on output.
NOR = NOT + OR — output '1' only when both inputs '0'.

Both NAND and NOR are universal gates — any logic function can be built from either alone.

29.3.3 Realization from NAND Gate

NOT: short both NAND inputs together (A = B)
AND: two NAND gates — first NAND, second inverts output
OR: three NAND gates — invert each input, then NAND the results

         SEMICONDUCTOR APPLICATIONS — KEY POINTS
         ======================================
    Half-wave        :  V_dc = V_m/π ; uses 50% input
    Full-wave        :  V_dc = 2V_m/π ; centre-tap + 2 diodes
    PIV              :  ≥ V_m (half) ; ≥ 2V_m (full + filter)
    Zener regulator  :  V_O = V_Z ; I_S = (V_i−V_Z)/R_S
    Amplifier (CE)   :  A_V = −βR_L/r_i ; 180° phase shift
    Switch           :  cut-off (V_O=V_CC) vs saturation (V_O≈0)
    Oscillator       :  Aβ = 1 sustained · Colpitt: LC + feedback
    AND / OR / NOT   :  A·B , A+B , Ā
    Universal gates  :  NAND and NOR

Quick Revision

Half-wave rectified DC has more AC ripple than full-wave.
Zener dissipates more power when load current is less (more I_Z flows).
Amplifier needs proper biasing; signal amplitude must stay in linear region.
Digital '0' ≈ 0 V, '1' ≈ 5 V — wide separation gives noise immunity.
NAND gate alone can implement NOT, AND, and OR.

20 cards · click any card to flip

Rectification

Conversion of AC to DC using p-n junction diode's asymmetric conduction. Forward bias conducts; reverse bias blocks. Used in chargers, adapters, power supplies.

Half-wave rectifier

One diode + transformer + R_L. Conducts only positive half-cycle. V_dc = V_m/π, I_dc = V_m/(πR_L). Uses only half input power. PIV must exceed V_m.

Full-wave rectifier

Centre-tapped transformer + two diodes D1, D2. X and Z opposite phase to Y. Both half-cycles rectified same direction. V_dc = 2V_m/π. PIV ≈ 2V_m with capacitor filter.

PIV (Peak Inverse Voltage)

Maximum reverse voltage a diode can withstand without breakdown. In half-wave: PIV = V_m. Must choose diode with PIV greater than peak AC to be rectified.

Capacitor filter

C across R_L in full-wave rectifier. Charges to V_m when diode conducts; discharges when current falls. Reduces ripple. Larger C and R_L → smoother DC. LC and π filters used in quality supplies.

Zener voltage regulator

Zener in reverse breakdown maintains V_O ≈ V_Z constant. Series R_S limits current. I_S = (V_i−V_Z)/R_S; I_Z = I_S−I_L. Stabilizes output against load and input voltage variation. Requires V_i > V_Z.

Zener power dissipation

P_d = V_Z × I_Z. When load current is zero, entire I_S flows through Zener — maximum dissipation. Must not exceed manufacturer's max rating. I_Z min ~ 5–20 mA always required.

Transistor amplifier gain

A_V = V_O/V_i = −βR_L/r_i = −g_m R_L. Negative sign = 180° phase shift. A_P = β × A_V. Small Δi_b produces large Δi_c = βΔi_b. Gain comes from DC supply V_CC.

Faithful amplification

Bias base at centre of linear I_B range. Input signal small so I_B ± Δi_b never reaches cut-off or saturation. Otherwise output is distorted and noisy. Operating point set by V_BB.

Transistor as switch — cut-off

I_B ≤ 0 (V_BB = 0): transistor off. Entire V_CC appears across C-E. V_O = V_CC. No collector current. Corresponds to logic '0' output in some circuits.

Transistor as switch — saturation

Large I_B drives transistor fully on. V_CE sat ≈ 0, V_O ≈ 0. I_C = V_CC/R_L. Used in digital circuits and LED indicators. Two distinct voltage levels like mechanical on/off switch.

Transistor oscillator

Sustained oscillations when loop gain Aβ = 1. Aβ < 1 → decay; Aβ > 1 → growing amplitude. CE amplifier (−180°) + feedback network (+180°) → positive feedback. Colpitt: LC tank + transistor CE.

Colpitt's oscillator

C1, C2 and L form resonant tank circuit. Output across C1; feedback across C2 to base. 180° from CE amplifier + 180° from C2 network = sustained oscillations at resonant frequency. Used in radios, clocks.

Digital signal

Takes only finite amplitude values — typically 0 V ('0') and 5 V ('1'). Immune to noise within ~2 V of each level. Used in computers. Coded as series of bits in Boolean algebra.

AND gate

Y = A·B = AB. Output '1' only when both A and B are '1'. Like switches in series. DDL: diodes conduct to ground when any input low → output 0.7 V (logic 0).

OR gate

Y = A + B. Output '1' when A OR B OR both are '1'. Like parallel switches. Diode OR: any high input forward-biases diode → output ~5 V (logic 1).

NOT gate

Y = Ā — inverts input. '0' in → '1' out; '1' in → '0' out. Implemented by transistor switch circuit identical to digital switch. Single input, single output.

NAND gate

NOT + AND combined. Output '1' when at least one input is '0'. Truth table = inverted AND. Universal gate — can build NOT, AND, OR from NAND alone. Short inputs for NOT; two NANDs for AND.

NOR gate

NOT + OR combined. Output '1' only when both inputs '0'. Truth table = inverted OR. Also a universal gate. Y = A+B with bar over entire expression.

Universal gates

NAND and NOR can implement all basic gates (AND, OR, NOT). NAND: short inputs → NOT; NAND+NAND → AND; three NANDs → OR. Foundation of digital IC design.

V_dc = V_m / π

I_dc = V_m / (πR_L)

V_dc = 2V_m / π

I_dc = 2V_m / (πR_L)

PIV ≥ V_m (half) · ≥ 2V_m (full)

I_S = (V_i − V_Z) / R_S

I_Z = I_S − I_L · V_O = V_Z

P_d = V_Z × I_Z

A_V = −βR_L / r_i

Cut-off: V_O = V_CC · Sat: I_C = V_CC/R_L

Oscillator: Aβ = 1

AND: Y=AB · OR: Y=A+B · NOT: Y=Ā

1. Formulas & Definitions

Full Ch 29 study guide — rectifiers, Zener regulator, transistor circuits, and logic gates.

V_dc = V_m / π

Definition: Average DC voltage from half-wave rectifier.

Derivation

Integrate V_m sin(ωt) over conducting half-cycle (0 to π); average over full period T.

Variables

V_m = peak AC voltage from transformer secondary

Why it works

Standard result for single-diode half-wave rectification.

Historical context

Only positive half-cycle conducts — ~50% input power used.

Deep understanding

Output still pulsates; capacitor filter needed for steady DC.

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

Find peak voltage V_m
Half-wave conducts π radians per cycle
V_dc = V_m/π
Add filter for ripple reduction

3. Solved Examples

Basic

Q: V_m = 10 V?

Solution: V_dc ≈ 3.18 V

Answer: 10/π V

Intermediate

Q: Full-wave same V_m?

Solution: 2V_m/π

Answer: Twice half-wave

Advanced

Q: RMS vs DC avg?

Solution: different

Answer: V_rms = V_m/√2

Exam

Q: Half-wave V_dc?

Solution: V_m/π

Answer: Sec 29.1

I_dc = V_m / (πR_L)

Definition: Average DC current in half-wave rectifier with load R_L.

Derivation

Ohm's law with average rectified voltage V_dc = V_m/π.

Variables

R_L = load resistance · I_dc = average unidirectional current

Why it works

Links peak AC, load, and usable DC current in half-wave circuit.

Historical context

PIV of diode must exceed V_m to avoid breakdown on reverse half.

Deep understanding

During reverse half-cycle I = 0 — average over full period gives this formula.

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

Calculate V_dc = V_m/π
Apply I_dc = V_dc/R_L
Check diode PIV ≥ V_m
Consider filter capacitor if needed

3. Solved Examples

Basic

Q: V_m=10 V, R_L=100 Ω?

Solution: I_dc≈32 mA

Answer: ~0.032 A

Intermediate

Q: R_L halved?

Solution: I_dc doubles

Answer: 2× current

Advanced

Q: No load?

Solution: I undefined

Answer: Open circuit

Exam

Q: Half-wave I_dc?

Solution: V_m/(πR_L)

Answer: Sec 29.1

V_dc = 2V_m / π

Definition: Average DC voltage from centre-tap full-wave rectifier.

Derivation

Both half-cycles rectified in same direction; effective integration gives factor 2 over half-wave.

Variables

Centre-tapped transformer · two diodes D1, D2 alternate conduction

Why it works

Twice the half-wave average — more efficient use of transformer secondary.

Historical context

X and Z windings opposite phase to centre tap Y.

Deep understanding

Still pulsating; capacitor across R_L smooths to ~V_m when conducting.

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

Centre-tap full-wave setup
Both halves rectified same polarity
V_dc = 2V_m/π
Less ripple than half-wave

3. Solved Examples

Basic

Q: V_m = 10 V?

Solution: V_dc ≈ 6.37 V

Answer: 20/π V

Intermediate

Q: vs half-wave?

Solution: 2× average

Answer: Double

Advanced

Q: Bridge rectifier?

Solution: same 2V_m/π

Answer: Similar average

Exam

Q: Full-wave V_dc?

Solution: 2V_m/π

Answer: Sec 29.1

I_dc = 2V_m / (πR_L)

Definition: Average DC current in full-wave rectifier.

Derivation

I_dc = V_dc/R_L with V_dc = 2V_m/π.

Variables

Each diode conducts alternate half-cycles

Why it works

Full-wave delivers higher average current than half-wave for same V_m and R_L.

Historical context

PIV of each diode ≥ 2V_m when capacitor filter used.

Deep understanding

Larger C and R_L → smaller ripple fluctuations.

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

V_dc = 2V_m/π
I_dc = V_dc/R_L
Check PIV rating of diodes
Add filter capacitor C

3. Solved Examples

Basic

Q: V_m=10 V, R_L=50 Ω?

Solution: I_dc≈127 mA

Answer: ~0.127 A

Intermediate

Q: Half-wave same?

Solution: half this I_dc

Answer: 50% less

Advanced

Q: Filter effect?

Solution: smoother V

Answer: C charges to ~V_m

Exam

Q: Full-wave I_dc?

Solution: 2V_m/(πR_L)

Answer: Sec 29.1

PIV ≥ V_m (half) · ≥ 2V_m (full)

Definition: Peak Inverse Voltage — maximum reverse voltage diode must withstand.

Derivation

Half-wave: diode sees full reverse peak V_m. Full-wave + filter: each diode can see up to ~2V_m.

Variables

PIV = peak inverse voltage rating of diode

Why it works

Diode selection — must not exceed breakdown in reverse half-cycle.

Historical context

Exceeding PIV destroys rectifier diode.

Deep understanding

Safety margin: choose diode PIV well above calculated minimum.

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

Identify rectifier type
Half-wave: PIV ≥ V_m
Full-wave with filter: PIV ≥ 2V_m
Select diode with margin

3. Solved Examples

Basic

Q: Half-wave V_m=15 V?

Solution: PIV>15 V

Answer: ≥ 15 V

Intermediate

Q: Full-wave V_m=15 V?

Solution: PIV≥30 V

Answer: ≥ 30 V

Advanced

Q: No filter full-wave?

Solution: lower PIV

Answer: Varies with config

Exam

Q: Half-wave PIV?

Solution: ≥ V_m

Answer: Sec 29.1

I_S = (V_i − V_Z) / R_S

Definition: Series current in Zener voltage regulator circuit.

Derivation

Kirchhoff: voltage drop across R_S = V_i − V_Z when Zener in breakdown.

Variables

V_i = input DC · V_Z = Zener breakdown voltage · R_S = series resistor

Why it works

Design equation for Zener regulator — choose R_S for current limits.

Historical context

Requires V_i > V_Z for regulation to work.

Deep understanding

Example 29.1: 6 V Zener, V_i 16.5–21 V → R_S ≈ 100 Ω.

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

Know V_i and V_Z
I_S = (V_i − V_Z)/R_S
I_S splits to I_Z and I_L
Ensure I_Z ≥ I_Z min

3. Solved Examples

Basic

Q: V_i=12 V, V_Z=6 V, R_S=100 Ω?

Solution: I_S=60 mA

Answer: 0.06 A

Intermediate

Q: V_i rises?

Solution: I_S rises

Answer: More series current

Advanced

Q: V_i < V_Z?

Solution: no regulation

Answer: Zener off

Exam

Q: Zener I_S?

Solution: (V_i−V_Z)/R_S

Answer: Sec 29.1

I_Z = I_S − I_L · V_O = V_Z

Definition: Zener shunt current and regulated output voltage.

Derivation

Kirchhoff current law: series current I_S divides between Zener and load.

Variables

I_L = load current · V_O ≈ V_Z constant

Why it works

Zener absorbs excess current so V_O stays stable when load varies.

Historical context

When I_L increases, I_Z decreases — V_O remains V_Z.

Deep understanding

I_Z min ~ 5–20 mA must always flow to keep Zener in breakdown.

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

Calculate I_S from R_S
Find load current I_L
I_Z = I_S − I_L
Check I_Z ≥ minimum rating

3. Solved Examples

Basic

Q: I_S=60 mA, I_L=40 mA?

Solution: I_Z=20 mA

Answer: 20 mA

Intermediate

Q: I_L increases?

Solution: I_Z decreases

Answer: V_O stable

Advanced

Q: I_L > I_S?

Solution: regulation fails

Answer: V_O drops

Exam

Q: Zener I_Z?

Solution: I_S − I_L

Answer: Sec 29.1

P_d = V_Z × I_Z

Definition: Power dissipated in Zener diode.

Derivation

P = VI for Zener operating in reverse breakdown.

Variables

P_d must not exceed Zener wattage rating (e.g. 1 W)

Why it works

Thermal limit — low load current means higher I_Z and more Zener heating.

Historical context

Zener dissipates more when load draws less current.

Deep understanding

Select Zener power rating for worst case (minimum I_L, maximum V_i).

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

Find I_Z at worst case
P_d = V_Z × I_Z
Compare to rated power
Choose higher wattage if needed

3. Solved Examples

Basic

Q: 6 V, I_Z=50 mA?

Solution: P_d=0.3 W

Answer: 0.3 W

Intermediate

Q: 1 W Zener OK?

Solution: yes

Answer: Within rating

Advanced

Q: I_L=0?

Solution: max I_Z

Answer: Max P_d case

Exam

Q: Zener power?

Solution: V_Z I_Z

Answer: Sec 29.1

A_V = −βR_L / r_i

Definition: CE amplifier voltage gain (magnitude and phase).

Derivation

Δi_c = βΔi_b; V_O = −Δi_c R_L; negative sign = 180° phase shift.

Variables

r_i = input resistance · g_m = β/r_i · A_V = −g_m R_L

Why it works

Core amplification formula — small V_i controls large V_O via β.

Historical context

Power gain A_P = A_I × A_V — energy from V_CC, not signal.

Deep understanding

Faithful amp: bias at centre of linear region; signal small enough to avoid cut-off/saturation.

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

CE configuration with R_L
A_V = −βR_L/r_i
Negative = inverted output
Keep signal in linear region

3. Solved Examples

Basic

Q: β=50, R_L=2 kΩ, r_i=1 kΩ?

Solution: |A_V|=100

Answer: 100

Intermediate

Q: Phase shift?

Solution: 180°

Answer: Inverted

Advanced

Q: A_P?

Solution: β×A_V

Answer: Power gain

Exam

Q: CE voltage gain?

Solution: −βR_L/r_i

Answer: Sec 29.2

Cut-off: V_O = V_CC · Sat: I_C = V_CC/R_L

Definition: Transistor switch two states — off (cut-off) and on (saturation).

Derivation

Cut-off: I_B ≤ 0, transistor off, V_CE = V_CC. Saturation: large I_B, V_CE sat ≈ 0, I_C = V_CC/R_L.

Variables

V_BB = 0 → cut-off · V_BB = 5 V → saturation (example)

Why it works

Digital switching — LED indicator, logic levels, relay control.

Historical context

V_O ≈ 0 in saturation; V_O = V_CC in cut-off.

Deep understanding

LED in collector lights when transistor saturates (high input).

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

I_B ≤ 0 → cut-off
V_O = V_CC (high)
Large I_B → saturation
V_O ≈ 0, I_C = V_CC/R_L

3. Solved Examples

Basic

Q: Transistor off?

Solution: V_O = V_CC

Answer: High output

Intermediate

Q: Saturated?

Solution: V_O ≈ 0

Answer: ~0 V

Advanced

Q: I_C in sat?

Solution: V_CC/R_L

Answer: Max collector I

Exam

Q: Switch cut-off V_O?

Solution: V_CC

Answer: Sec 29.2

Oscillator: Aβ = 1

Definition: Barkhausen condition for sustained oscillations.

Derivation

Loop gain product of amplifier gain A and feedback fraction β equals unity.

Variables

CE amp gives −180° shift; feedback network adds +180° (e.g. Colpitt LC)

Why it works

Explains when oscillator produces constant-amplitude AC output.

Historical context

Colpitt oscillator: LC tank at f_res; feedback from C2 to base.

Deep understanding

Needs amplifier + positive feedback; gain sufficient at resonant frequency.

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

Amplifier with feedback loop
Total phase shift = 360°
Aβ = 1 at f_res
Sustained oscillations

3. Solved Examples

Basic

Q: Sustained oscillation?

Solution: Aβ=1

Answer: Unity loop gain

Intermediate

Q: CE phase?

Solution: −180°

Answer: Needs +180° feedback

Advanced

Q: Colpitt uses?

Solution: LC + capacitors

Answer: Tank circuit

Exam

Q: Oscillator condition?

Solution: Aβ=1

Answer: Sec 29.2

AND: Y=AB · OR: Y=A+B · NOT: Y=Ā

Definition: Basic Boolean logic gate equations.

Derivation

Digital signals: 0 V = '0', 5 V = '1'. AND: high only if both high. OR: high if any high. NOT: invert.

Variables

NAND = NOT+AND · NOR = NOT+OR · both universal gates

Why it works

Foundation of digital electronics — computers, calculators, controllers.

Historical context

DDL diode logic; NOT via transistor switch.

Deep understanding

NAND alone builds NOT (tie inputs), AND (double NAND), OR (three NAND).

2. Diagrams & Visuals

Color-coded visual · step-by-step breakdown below

Write truth table
AND: Y=AB (both 1 → 1)
OR: Y=A+B (any 1 → 1)
NOT: Y=Ā (invert)

3. Solved Examples

Basic

Q: A=1,B=0 AND?

Solution: Y=0

Answer: 0

Intermediate

Q: A=0,B=1 OR?

Solution: Y=1

Answer: 1

Advanced

Q: NAND universal?

Solution: yes

Answer: Build all gates

Exam

Q: AND equation?

Solution: Y=AB

Answer: Sec 29.3

5. Special Features & Extras

Complete study guide for Applications of Semiconductor Devices.

Exam Tips & Tricks

Half-wave: V_dc = V_m/π · uses 50% input · PIV ≥ V_m.
Full-wave: V_dc = 2V_m/π · centre-tap + 2 diodes · PIV ≥ 2V_m (with filter).
Filter: capacitor across R_L charges to ~V_m; larger C → less ripple.
Zener: V_O = V_Z · I_S = (V_i−V_Z)/R_S · I_Z = I_S−I_L · need V_i > V_Z.
Amplifier CE: A_V = −βR_L/r_i · 180° phase shift · bias at linear centre.
Switch: cut-off V_O = V_CC · saturation V_O ≈ 0, I_C = V_CC/R_L.
Oscillator: Aβ = 1 · Colpitt uses LC tank + capacitive feedback.
Logic: AND Y=AB · OR Y=A+B · NOT Y=Ā · NAND/NOR universal.
Digital levels: 0 ≈ 0 V · 1 ≈ 5 V — noise immunity ~2 V.

Common Student Mistakes

Using V_rms instead of V_m in rectifier formulas
Forgetting full-wave V_dc is twice half-wave (not the same)
Confusing PIV requirements for half vs full-wave
Assuming Zener regulates when V_i < V_Z
Ignoring negative sign in A_V (180° phase inversion)
Thinking amplifier creates energy (power comes from V_CC)
Confusing NAND truth table with AND

Memory Aids & Mnemonics

Rectifier DC: "Half over π, full is double — 2V_m/π"

PIV: "Half needs V_m, full with filter needs 2V_m"

Zener: "Series in, shunt Zener — I_S splits to Z and load"

Logic: "AND needs All, OR needs One, NOT negates"

Which Formula When?

Half-wave average voltage? → V_dc = V_m/π
Full-wave average voltage? → V_dc = 2V_m/π
Diode rating? → PIV ≥ V_m or 2V_m
Zener series resistor? → I_S = (V_i−V_Z)/R_S
Zener power check? → P_d = V_Z × I_Z
CE voltage gain? → A_V = −βR_L/r_i
Switch on-state current? → I_C = V_CC/R_L
Sustained oscillation? → Aβ = 1
Logic output? → AND/OR/NOT Boolean equations

QUICK REFERENCE — Ch 29 Semiconductor Applications

V_dc = V_m / πI_dc = V_m / (πR_L)V_dc = 2V_m / πI_dc = 2V_m / (πR_L)PIV ≥ V_m (half) · ≥ 2V_m (full)I_S = (V_i − V_Z) / R_SI_Z = I_S − I_L · V_O = V_ZP_d = V_Z × I_ZA_V = −βR_L / r_iCut-off: V_O = V_CC · Sat: I_C = V_CC/R_LOscillator: Aβ = 1AND: Y=AB · OR: Y=A+B · NOT: Y=Ā

Rectifiers: half V_m/π · full 2V_m/π · filter with C across R_L

Zener: V_O=V_Z · I_S=(V_i−V_Z)/R_S · P_d=V_Z I_Z

Tip: Full-wave has less ripple than half-wave — preferred in power supplies.

PYQ — Previous Year Questions

Extracted from NIOS Physics (312) board exam papers in your PDF. Chapter L29 — Applications of Semiconductor Devices only. Use Model Answer for marking points; Explanation for concept clarity.

Chapter 29 — Applications of Semiconductor Devices (L29)

11 questions · Sections A & B · Sources: 312/MAY/204A–C, 312/TUS/104A, 68/ESS/1-312-A

Section A — Objective (1 mark)

PYQ1. Which of the following is called a universal gate? (A) AND gate (B) NAND gate (C) OR gate (D) NOT gate

1 mark · Section A Q2 · 312/MAY/204A (also Q7 · 204B, Q8 · 204C)

Model Answer

(B) NAND gate (NOR gate is also universal)

Any Boolean function can be implemented using NAND gates alone.

Explanation

NAND + NAND → AND; shorted inputs → NOT; three NANDs → OR. Basis of digital IC design (L29 §29.4).

Section B — Short Answer (2 marks)

PYQ2. Draw the symbol and truth table of NOT gate.

2 marks · Section B Q34 · 312/MAY/204A

Model Answer

Boolean expression: Y = Ā (or Y = NOT A)

Truth table: A=0 → Y=1; A=1 → Y=0

Symbol: triangle with circle (inversion bubble) at output.

Explanation

NOT inverts the input — fundamental logic gate (L29 §29.4).

PYQ3. Draw the symbol and truth table of OR gate.

2 marks · Section B Q34 · 312/MAY/204B

Model Answer

Y = A + B (logical OR)

Truth table: (0,0)→0; (0,1)→1; (1,0)→1; (1,1)→1

Symbol: curved-input OR gate shape.

Explanation

Output high if any input is high (L29 §29.4).

PYQ4. Draw the symbol and truth table of AND gate.

2 marks · Section B Q34 · 312/MAY/204C

Model Answer

Y = A · B

Truth table: (0,0)→0; (0,1)→0; (1,0)→0; (1,1)→1

Symbol: flat-input AND gate (D-shape).

Explanation

Output high only when all inputs are high (L29 §29.4).

PYQ5. Looking at a p-n junction diode, how do you identify which of its ends is p-type and which is n-type? Why is it required?

2 marks · Section B Q30 (OR) · 312/MAY/204A (also Q29 · 204B, Q31 · 204C)

Model Answer

Identification: coloured band/mark on cathode (n-side); arrow in symbol points from p to n; physically p-side often connected to anode terminal in rectifier packages.

Why required: correct forward/reverse biasing in rectifier, regulator and logic circuits — wrong connection prevents conduction or damages device.

Explanation

Practical circuit assembly depends on knowing p and n terminals (L29 §29.1).

PYQ6. Write any two applications of photocells.

2 marks · Section B Q31 · 68/ESS/1-312-A

Model Answer

Automatic switching (street lights, door openers)
Exposure control in cameras / light meters
Reading sound tracks in cinematography
Solar-powered calculators and chargers

(Any two)

Explanation

Photocell/photodiode converts light to electrical signal — basis of optoelectronic applications (L29 §29.1).

PYQ7. Explain the I–V characteristics of a light emitting diode (LED).

2 marks · Section B Q42 (b) · 68/ESS/1-312-A (Marking Scheme)

Model Answer

LED conducts only in forward bias above a threshold voltage V₀ (≈1.2–3.5 V depending on colour).

Current rises sharply after knee; light intensity ∝ forward current.

Different materials → different colours and different threshold voltages.

Explanation

Electroluminescence on recombination in forward-biased p-n junction; reverse current negligible (L29 §29.1 / L28 §28.2).

Section B — Long Answer (3 marks)

PYQ8. Draw the circuit diagram of a full-wave rectifier using p-n junction diode. Explain its working and show the input and output waveforms.

3 marks · Section B Q38 · 68/ESS/1-312-A (Marking Scheme)

Model Answer

Circuit: centre-tapped transformer + two diodes D1, D2 + load R_L (or bridge of 4 diodes).

Working: positive half-cycle — D1 forward, current A→B through R_L; negative half — D2 forward, same direction through R_L.

Waveforms: input sinusoidal AC; output pulsating unidirectional full-wave train (both halves used).

Explanation

Average DC = 2V_m/π; PIV ≥ 2V_m per diode (centre-tap). Marking scheme: two diodes alternate conduction (L29 §29.1).

PYQ9. Distinguish between n-type and p-type extrinsic semiconductors (any two points). Explain the formation of depletion zone in p-n junction.

3 marks · Section B Q41 · 312/MAY/204C

Model Answer

n-type: pentavalent dopant (P, As) → excess electrons; majority carriers = electrons.

p-type: trivalent dopant (B, Al) → excess holes; majority carriers = holes.

Depletion zone: diffusion of e⁻ n→p and holes p→n → recombination → immobile ions at junction → carrier-depleted region (~0.5 μm).

Explanation

Doping creates usable devices; depletion layer is the heart of diode action in all applications (L28 §28.1, L29 §29.1).

Section B — Long Answer (5 marks)

PYQ10. Give the Boolean expression, logic symbol, truth table and implementation circuit of NOT gate.

5 marks · Section B Q43 · 312/TUS/104A

Model Answer

Boolean: Y = Ā

Symbol: inverter triangle + bubble

Truth table: 0→1, 1→0

Circuit: single transistor inverter (RTL) or NAND gate with inputs shorted (universal-gate implementation)

Explanation

Full 5-mark gate question: expression + symbol + table + practical circuit (L29 §29.4).

PYQ11. What is a rectifier? What characteristic of a p-n junction makes it suitable for use as rectifier? Draw the circuit diagram for a half-wave rectifier, and show the input and output voltage. What is done to remove fluctuations from the output?

5 marks · Section B Q43 (OR) · 312/TUS/104A

Model Answer

Rectifier: device/circuit converting AC to pulsating DC.

p-n suitability: unidirectional conduction — low resistance forward, very high reverse.

Half-wave circuit: AC → diode → R_L; input sine wave, output positive half-cycles only.

Smoothing: capacitor filter across load (charges at peaks, discharges between) — also LC or π-filter for better regulation.

Explanation

Complete rectifier application chain: convert → filter → regulate (Zener in L28/L29) (L29 §29.1).

Problem Solving — L29 Applications of Semiconductor Devices

Six problems spanning this chapter’s NIOS syllabus. Every question is built from the notes and formula sheet: solve with equations first, then read the formal textbook-style write-up, the easy explanation, and the topic in depth (formulas, meaning, exam tips). Explanations open by default.

Question 1 of 6Logic

Draw the circuit symbols of 2-input AND and OR gates and write their truth tables.

Pencil sketch (labelled)

Pencil sketch: AND/OR symbols with truth rules

Solution — step by step with formulas

Draw AND and OR symbols (see pencil sketch).
AND: output 1 only if both inputs 1.
OR: output 1 if either input is 1.

Final answer: AND: 00→0,01→0,10→0,11→1; OR: 0 only for 00

Textbook formal language

Boolean algebra underlies digital electronics. AND and OR are fundamental binary operations on {0,1}.

Working formula set for this problem: (see solution steps). In the NIOS presentation, physical quantities must be expressed in SI units and the relevant law or definition stated before substitution. Vector quantities require an explicit choice of positive direction; scalar work and energy require attention to sign conventions of the textbook.

Easy language (same idea, plain words)

AND needs both switches on; OR needs any switch on. The sketch shows the usual gate shapes.

Read the question once for the story, once for the numbers. Write the formula, plug in values with units, then simplify. If a result looks huge or tiny, re-check powers of ten and whether you used sin/cos of the correct angle.

Topic in depth — Logic gates

NOT, NAND, NOR complete logic families. NAND is universal.

Link to chapter notes (L29 — Logic gates): this idea sits with the definitions and worked examples in the detailed notes and formula sheet. Memorise: (see solution steps). In multi-step questions, keep a free-body diagram or energy flow sketch before algebra; most errors are missing forces or wrong signs, not hard maths.

Exam tip

Quote the law in one line, then write (see solution steps) before numbers. Box the final answer with unit. For numericals, keep at least three significant figures until the last step unless the data are coarse.

Common mistakes

Mixing up scalar and vector quantities (e.g. treating momentum as unsigned).
Using the wrong sign convention for work/heat/force direction.
Forgetting to convert units (g↔kg, cm↔m, minutes↔seconds).
Applying a formula outside its assumptions (e.g. F = ma when mass is not constant).

Question 2 of 6NAND

Why is NAND called a universal gate?

Solution — step by step with formulas

Any Boolean function can be implemented using only NAND gates.

Final answer: NAND alone can build NOT/AND/OR

Textbook formal language

Functionally complete set: {NAND} or {NOR}.

Easy language (same idea, plain words)

With enough NANDs you can build every other logic block.

Topic in depth — Universal gate

Simplifies IC design libraries.

Link to chapter notes (L29 — Universal gate): this idea sits with the definitions and worked examples in the detailed notes and formula sheet. Memorise: (see solution steps). In multi-step questions, keep a free-body diagram or energy flow sketch before algebra; most errors are missing forces or wrong signs, not hard maths.

Exam tip

Common mistakes

Mixing up scalar and vector quantities (e.g. treating momentum as unsigned).
Using the wrong sign convention for work/heat/force direction.
Forgetting to convert units (g↔kg, cm↔m, minutes↔seconds).
Applying a formula outside its assumptions (e.g. F = ma when mass is not constant).

Question 3 of 6LED

Explain light emission in an LED (qualitative).

Solution — step by step with formulas

Forward-biased junction recombination of e⁻ and holes releases E_g as photon (visible/IR).

Final answer: Recombination radiation in forward bias

Textbook formal language

Direct band-gap materials preferred for efficient photon emission.

Easy language (same idea, plain words)

Electrons fall into holes and spit out light of colour set by material.

Topic in depth — LED

Unlike laser, LED is incoherent spontaneous emission.

Link to chapter notes (L29 — LED): this idea sits with the definitions and worked examples in the detailed notes and formula sheet. Memorise: (see solution steps). In multi-step questions, keep a free-body diagram or energy flow sketch before algebra; most errors are missing forces or wrong signs, not hard maths.

Exam tip

Common mistakes

Mixing up scalar and vector quantities (e.g. treating momentum as unsigned).
Using the wrong sign convention for work/heat/force direction.
Forgetting to convert units (g↔kg, cm↔m, minutes↔seconds).
Applying a formula outside its assumptions (e.g. F = ma when mass is not constant).

Question 4 of 6Photodiode

How does a photodiode detect light?

Solution — step by step with formulas

Photons generate e–h pairs in depletion region; reverse current increases with intensity.

Final answer: Light → carriers → reverse photocurrent

Textbook formal language

Operated in reverse bias for linear response and speed.

Easy language (same idea, plain words)

Light frees charges; measured current tells brightness.

Topic in depth — Photodiode

Used in sensors, optical comms receivers.

Link to chapter notes (L29 — Photodiode): this idea sits with the definitions and worked examples in the detailed notes and formula sheet. Memorise: (see solution steps). In multi-step questions, keep a free-body diagram or energy flow sketch before algebra; most errors are missing forces or wrong signs, not hard maths.

Exam tip

Common mistakes

Mixing up scalar and vector quantities (e.g. treating momentum as unsigned).
Using the wrong sign convention for work/heat/force direction.
Forgetting to convert units (g↔kg, cm↔m, minutes↔seconds).
Applying a formula outside its assumptions (e.g. F = ma when mass is not constant).

Question 5 of 6Solar cell

State energy conversion in a solar cell and required condition at junction.

Solution — step by step with formulas

Light → electrical (photovoltaic); p–n junction separates carriers creating emf.

Final answer: Photovoltaic conversion at illuminated p–n junction

Textbook formal language

Open-circuit voltage and short-circuit current characterise cell.

Easy language (same idea, plain words)

Sunlight knocks charges apart at the junction; they flow in an external circuit as electricity.

Topic in depth — Solar cell

Efficiency limited by spectrum, recombination, reflection.

Link to chapter notes (L29 — Solar cell): this idea sits with the definitions and worked examples in the detailed notes and formula sheet. Memorise: (see solution steps). In multi-step questions, keep a free-body diagram or energy flow sketch before algebra; most errors are missing forces or wrong signs, not hard maths.

Exam tip

Common mistakes

Mixing up scalar and vector quantities (e.g. treating momentum as unsigned).
Using the wrong sign convention for work/heat/force direction.
Forgetting to convert units (g↔kg, cm↔m, minutes↔seconds).
Applying a formula outside its assumptions (e.g. F = ma when mass is not constant).

Question 6 of 6IC

Give two advantages of ICs over discrete circuits.

Solution — step by step with formulas

Miniaturisation; low power; high reliability; low cost at scale; matched components.

Final answer: Small, reliable, low power, cheap mass production

Textbook formal language

Monolithic fabrication integrates many devices on one chip.

Easy language (same idea, plain words)

Whole circuits printed tiny on silicon—lighter gadgets, fewer wiring failures.

Topic in depth — Integrated circuits

Analog, digital, and mixed-signal ICs.

Link to chapter notes (L29 — Integrated circuits): this idea sits with the definitions and worked examples in the detailed notes and formula sheet. Memorise: (see solution steps). In multi-step questions, keep a free-body diagram or energy flow sketch before algebra; most errors are missing forces or wrong signs, not hard maths.

Exam tip

Common mistakes

Mixing up scalar and vector quantities (e.g. treating momentum as unsigned).
Using the wrong sign convention for work/heat/force direction.
Forgetting to convert units (g↔kg, cm↔m, minutes↔seconds).
Applying a formula outside its assumptions (e.g. F = ma when mass is not constant).